RTOS Development

Firmware & Embedded

Development, optimization and porting of RTOS solutions including scheduling, synchronization, multicore communication and memory optimization, for firmware where deadlines are guaranteed, not hoped for.

We delivered

A task and interrupt architecture document with timing budget, RTOS firmware source with unit and on-target tests, trace captures proving deadline compliance under load, and a memory and CPU utilization report.

Task architecture design covering priorities, scheduling and worst-case timing analysis. RTOS porting to new silicon and board support packages. Inter-core communication for heterogeneous multicore SoCs. Memory footprint and stack usage optimization.

Used for firmware with hard deadlines such as motor control, power electronics or sensor fusion, porting from bare-metal or a legacy RTOS to FreeRTOS or Zephyr, and fixing priority inversion, jitter or stack overflow issues.

Built with FreeRTOS, Zephyr, AUTOSAR Classic OS, C/C++, Tracealyzer and SEGGER SystemView.